78 lines
1.9 KiB
ArmAsm
78 lines
1.9 KiB
ArmAsm
.section ".text","ax"
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#define SIGTRAP 5
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#define SIZEOF_I386_REGS 32
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#define SIZEOF_I386_FLAGS 4
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/* When invoked, the stack contains: eflags, cs, eip, signo. */
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#define IH_OFFSET_GDB_REGS ( 0 )
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#define IH_OFFSET_GDB_EIP ( IH_OFFSET_GDB_REGS + SIZEOF_I386_REGS )
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#define IH_OFFSET_GDB_EFLAGS ( IH_OFFSET_GDB_EIP + 4 )
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#define IH_OFFSET_GDB_SEG_REGS ( IH_OFFSET_GDB_EFLAGS + SIZEOF_I386_FLAGS )
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#define IH_OFFSET_GDB_END ( IH_OFFSET_GDB_SEG_REGS + 6 * 4 )
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#define IH_OFFSET_OLD_EIP ( IH_OFFSET_GDB_END )
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#define IH_OFFSET_OLD_CS ( IH_OFFSET_OLD_EIP + 4 )
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#define IH_OFFSET_OLD_EFLAGS ( IH_OFFSET_OLD_CS + 4 )
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#define IH_OFFSET_END ( IH_OFFSET_OLD_EFLAGS + 4 )
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/* We also access the stack whilst still storing or restoring
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* the register snapshot. Since ESP is in flux, we need
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* special offsets.
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*/
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#define IH_OFFSET_FLUX_OLD_CS ( IH_OFFSET_OLD_CS - 44 )
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#define IH_OFFSET_FLUX_OLD_EFLAGS ( IH_OFFSET_OLD_EFLAGS - 40 )
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#define IH_OFFSET_FLUX_OLD_EIP ( IH_OFFSET_OLD_EIP - 36 )
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#define IH_OFFSET_FLUX_END ( IH_OFFSET_END - 20 )
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.global int_handler
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int_handler:
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/* Store CPU state in GDB register snapshot */
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pushw $0
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pushw %gs
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pushw $0
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pushw %fs
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pushw $0
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pushw %es
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pushw $0
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pushw %ds
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pushw $0
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pushw %ss
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pushw $0
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pushw IH_OFFSET_FLUX_OLD_CS + 2(%esp)
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pushl IH_OFFSET_FLUX_OLD_EFLAGS(%esp)
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pushl IH_OFFSET_FLUX_OLD_EIP(%esp)
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pushl %edi
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pushl %esi
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pushl %ebp
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leal IH_OFFSET_FLUX_END(%esp), %edi
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pushl %edi /* old ESP */
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pushl %ebx
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pushl %edx
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pushl %ecx
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pushl %eax
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/* Call GDB stub exception handler */
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movl $SIGTRAP, %eax
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movl %esp, %edx
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call gdbstub_handler
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/* Restore CPU state from GDB register snapshot */
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popl %eax
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popl %ecx
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popl %edx
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popl %ebx
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addl $4, %esp /* Changing ESP currently not supported */
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popl %ebp
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popl %esi
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popl %edi
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popl IH_OFFSET_FLUX_OLD_EIP(%esp)
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popl IH_OFFSET_FLUX_OLD_EFLAGS(%esp)
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popl IH_OFFSET_FLUX_OLD_CS(%esp)
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popl %ss
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popl %ds
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popl %es
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popl %fs
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popl %gs
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iret
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