796 lines
21 KiB
C
796 lines
21 KiB
C
/* ----------------------------------------------------------------------- *
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*
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* Copyright 2010 Intel Corporation; author: H. Peter Anvin
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom
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* the Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall
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* be included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* ----------------------------------------------------------------------- */
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/*
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* Based on:
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*
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* 915 resolution by steve tomljenovic
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*
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* This was tested only on Sony VGN-FS550. Use at your own risk
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*
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* This code is based on the techniques used in :
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*
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* - 855patch. Many thanks to Christian Zietz (czietz gmx net)
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* for demonstrating how to shadow the VBIOS into system RAM
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* and then modify it.
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*
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* - 1280patch by Andrew Tipton (andrewtipton null li).
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*
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* - 855resolution by Alain Poirier
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*
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* This source code is into the public domain.
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <unistd.h>
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#define __USE_GNU
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#include <string.h>
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#include <sys/io.h>
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#include <sys/cpu.h>
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#include <sys/pci.h>
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#include <unistd.h>
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#include <assert.h>
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#include <stdbool.h>
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#include "video.h"
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#include "debug.h"
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#define VBIOS_START 0xc0000
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#define VBIOS_SIZE 0x10000
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#define MODE_TABLE_OFFSET_845G 617
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#define VERSION "0.5.3"
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#define ATI_SIGNATURE1 "ATI MOBILITY RADEON"
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#define ATI_SIGNATURE2 "ATI Technologies Inc"
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#define NVIDIA_SIGNATURE "NVIDIA Corp"
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#define INTEL_SIGNATURE "Intel Corp"
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typedef unsigned char * address;
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typedef enum {
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CT_UNKWN, CT_830, CT_845G, CT_855GM, CT_865G, CT_915G, CT_915GM,
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CT_945G, CT_945GM, CT_946GZ, CT_G965, CT_Q965, CT_945GME,
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CHIPSET_TYPES
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} chipset_type;
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typedef enum {
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BT_UNKWN, BT_1, BT_2, BT_3
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} bios_type;
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static int freqs[] = { 60, 75, 85 };
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typedef struct {
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uint8_t mode;
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uint8_t bits_per_pixel;
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uint16_t resolution;
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uint8_t unknown;
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} __attribute__((packed)) vbios_mode;
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typedef struct {
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uint16_t clock; /* Clock frequency in 10 kHz */
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uint8_t x1;
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uint8_t x_total;
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uint8_t x2;
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uint8_t y1;
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uint8_t y_total;
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uint8_t y2;
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} __attribute__((packed)) vbios_resolution_type1;
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typedef struct {
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uint32_t clock;
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uint16_t x1;
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uint16_t htotal;
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uint16_t x2;
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uint16_t hblank;
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uint16_t hsyncstart;
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uint16_t hsyncend;
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uint16_t y1;
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uint16_t vtotal;
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uint16_t y2;
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uint16_t vblank;
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uint16_t vsyncstart;
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uint16_t vsyncend;
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} __attribute__((packed)) vbios_modeline_type2;
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typedef struct {
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uint8_t xchars;
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uint8_t ychars;
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uint8_t unknown[4];
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vbios_modeline_type2 modelines[];
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} __attribute__((packed)) vbios_resolution_type2;
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typedef struct {
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uint32_t clock;
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uint16_t x1;
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uint16_t htotal;
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uint16_t x2;
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uint16_t hblank;
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uint16_t hsyncstart;
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uint16_t hsyncend;
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uint16_t y1;
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uint16_t vtotal;
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uint16_t y2;
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uint16_t vblank;
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uint16_t vsyncstart;
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uint16_t vsyncend;
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uint16_t timing_h;
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uint16_t timing_v;
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uint8_t unknown[6];
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} __attribute__((packed)) vbios_modeline_type3;
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typedef struct {
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unsigned char unknown[6];
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vbios_modeline_type3 modelines[];
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} __attribute__((packed)) vbios_resolution_type3;
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typedef struct {
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unsigned int chipset_id;
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chipset_type chipset;
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bios_type bios;
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address bios_ptr;
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vbios_mode * mode_table;
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unsigned int mode_table_size;
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uint8_t b1, b2;
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bool unlocked;
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} vbios_map;
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#if 0 /* Debugging hacks */
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static void good_marker(int x)
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{
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((uint16_t *)0xb8000)[x] = 0x2f30 - ((x & 0xf0) << 4) + (x & 0x0f);
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}
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static void bad_marker(int x)
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{
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((uint16_t *)0xb8000)[x] = 0x4f30 - ((x & 0xf0) << 4) + (x & 0x0f);
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}
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static void status(const char *fmt, ...)
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{
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va_list ap;
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char msg[81], *p;
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int i;
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uint16_t *q;
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memset(msg, 0, sizeof msg);
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va_start(ap, fmt);
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vsnprintf(msg, sizeof msg, fmt, ap);
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va_end(ap);
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p = msg;
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q = (uint16_t *)0xb8000 + 80;
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for (i = 0; i < 80; i++)
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*q++ = *p++ + 0x1f00;
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}
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#else
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static inline void good_marker(int x) { (void)x; }
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static inline void bad_marker(int x) { (void)x; }
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static inline void status(const char *fmt, ...) { (void)fmt; }
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#endif
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static unsigned int get_chipset_id(void) {
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return pci_readl(0x80000000);
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}
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static chipset_type get_chipset(unsigned int id) {
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chipset_type type;
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switch (id) {
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case 0x35758086:
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type = CT_830;
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break;
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case 0x25608086:
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type = CT_845G;
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break;
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case 0x35808086:
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type = CT_855GM;
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break;
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case 0x25708086:
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type = CT_865G;
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break;
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case 0x25808086:
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type = CT_915G;
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break;
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case 0x25908086:
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type = CT_915GM;
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break;
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case 0x27708086:
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type = CT_945G;
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break;
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case 0x27a08086:
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type = CT_945GM;
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break;
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case 0x29708086:
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type = CT_946GZ;
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break;
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case 0x29a08086:
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type = CT_G965;
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break;
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case 0x29908086:
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type = CT_Q965;
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break;
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case 0x27ac8086:
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type = CT_945GME;
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break;
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default:
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type = CT_UNKWN;
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break;
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}
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return type;
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}
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static vbios_resolution_type1 * map_type1_resolution(vbios_map * map,
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uint16_t res)
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{
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vbios_resolution_type1 * ptr = ((vbios_resolution_type1*)(map->bios_ptr + res));
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return ptr;
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}
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static vbios_resolution_type2 * map_type2_resolution(vbios_map * map,
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uint16_t res)
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{
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vbios_resolution_type2 * ptr = ((vbios_resolution_type2*)(map->bios_ptr + res));
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return ptr;
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}
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static vbios_resolution_type3 * map_type3_resolution(vbios_map * map,
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uint16_t res)
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{
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vbios_resolution_type3 * ptr = ((vbios_resolution_type3*)(map->bios_ptr + res));
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return ptr;
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}
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static bool detect_bios_type(vbios_map * map, int entry_size)
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{
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unsigned int i;
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uint16_t r1, r2;
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r1 = r2 = 32000;
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for (i = 0; i < map->mode_table_size; i++) {
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if (map->mode_table[i].resolution <= r1) {
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r1 = map->mode_table[i].resolution;
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} else if (map->mode_table[i].resolution <= r2) {
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r2 = map->mode_table[i].resolution;
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}
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}
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return ((r2-r1-6) % entry_size) == 0;
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}
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static inline void close_vbios(vbios_map *map)
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{
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(void)map;
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}
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static vbios_map * open_vbios(void)
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{
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static vbios_map _map;
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vbios_map * const map = &_map;
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memset(&_map, 0, sizeof _map);
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/*
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* Determine chipset
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*/
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map->chipset_id = get_chipset_id();
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good_marker(0x10);
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map->chipset = get_chipset(map->chipset_id);
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good_marker(0x11);
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/*
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* Map the video bios to memory
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*/
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map->bios_ptr = (void *)VBIOS_START;
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/*
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* check if we have ATI Radeon
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*/
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if (memmem(map->bios_ptr, VBIOS_SIZE, ATI_SIGNATURE1, strlen(ATI_SIGNATURE1)) ||
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memmem(map->bios_ptr, VBIOS_SIZE, ATI_SIGNATURE2, strlen(ATI_SIGNATURE2)) ) {
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debug("ATI chipset detected. 915resolution only works with Intel 800/900 series graphic chipsets.\r\n");
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return NULL;
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}
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/*
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* check if we have NVIDIA
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*/
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if (memmem(map->bios_ptr, VBIOS_SIZE, NVIDIA_SIGNATURE, strlen(NVIDIA_SIGNATURE))) {
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debug("NVIDIA chipset detected. 915resolution only works with Intel 800/900 series graphic chipsets.\r\n");
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return NULL;
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}
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/*
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* check if we have Intel
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*/
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if (map->chipset == CT_UNKWN && memmem(map->bios_ptr, VBIOS_SIZE, INTEL_SIGNATURE, strlen(INTEL_SIGNATURE))) {
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debug("Intel chipset detected. However, 915resolution was unable to determine the chipset type.\r\n");
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debug("Chipset Id: %x\r\n", map->chipset_id);
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debug("Please report this problem to stomljen@yahoo.com\r\n");
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close_vbios(map);
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return NULL;
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}
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/*
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* check for others
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*/
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if (map->chipset == CT_UNKWN) {
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debug("Unknown chipset type and unrecognized bios.\r\n");
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debug("915resolution only works with Intel 800/900 series graphic chipsets.\r\n");
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debug("Chipset Id: %x\r\n", map->chipset_id);
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close_vbios(map);
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return NULL;
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}
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/*
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* Figure out where the mode table is
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*/
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good_marker(0x12);
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{
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address p = map->bios_ptr + 16;
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address limit = map->bios_ptr + VBIOS_SIZE - (3 * sizeof(vbios_mode));
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while (p < limit && map->mode_table == 0) {
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vbios_mode * mode_ptr = (vbios_mode *) p;
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if (((mode_ptr[0].mode & 0xf0) == 0x30) && ((mode_ptr[1].mode & 0xf0) == 0x30) &&
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((mode_ptr[2].mode & 0xf0) == 0x30) && ((mode_ptr[3].mode & 0xf0) == 0x30)) {
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map->mode_table = mode_ptr;
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}
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p++;
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}
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if (map->mode_table == 0) {
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debug("Unable to locate the mode table.\r\n");
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close_vbios(map);
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return NULL;
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}
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}
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good_marker(0x13);
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/*
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* Determine size of mode table
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*/
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{
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vbios_mode * mode_ptr = map->mode_table;
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while (mode_ptr->mode != 0xff) {
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map->mode_table_size++;
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mode_ptr++;
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}
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}
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good_marker(0x14);
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status("mode_table_size = %d", map->mode_table_size);
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/*
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* Figure out what type of bios we have
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* order of detection is important
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*/
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if (detect_bios_type(map, sizeof(vbios_modeline_type3))) {
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map->bios = BT_3;
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}
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else if (detect_bios_type(map, sizeof(vbios_modeline_type2))) {
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map->bios = BT_2;
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}
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else if (detect_bios_type(map, sizeof(vbios_resolution_type1))) {
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map->bios = BT_1;
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}
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else {
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debug("Unable to determine bios type.\r\n");
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debug("Mode Table Offset: $C0000 + $%x\r\n", ((unsigned int)map->mode_table) - ((unsigned int)map->bios_ptr));
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debug("Mode Table Entries: %u\r\n", map->mode_table_size);
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bad_marker(0x15);
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return NULL;
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}
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good_marker(0x15);
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return map;
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}
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static void unlock_vbios(vbios_map * map)
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{
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assert(!map->unlocked);
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map->unlocked = true;
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switch (map->chipset) {
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case CT_UNKWN:
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case CHIPSET_TYPES: /* Shut up gcc */
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break;
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case CT_830:
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case CT_855GM:
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map->b1 = pci_readb(0x8000005a);
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pci_writeb(0x33, 0x8000005a);
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break;
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case CT_845G:
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case CT_865G:
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case CT_915G:
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case CT_915GM:
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case CT_945G:
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case CT_945GM:
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case CT_945GME:
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case CT_946GZ:
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case CT_G965:
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case CT_Q965:
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map->b1 = pci_readb(0x80000091);
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map->b2 = pci_readb(0x80000092);
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pci_writeb(0x33, 0x80000091);
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pci_writeb(0x33, 0x80000092);
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break;
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}
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#if DEBUG
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{
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unsigned int t = inl(0xcfc);
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debug("unlock PAM: (0x%08x)\r\n", t);
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}
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#endif
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}
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static void relock_vbios(vbios_map * map)
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{
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assert(map->unlocked);
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map->unlocked = false;
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switch (map->chipset) {
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case CT_UNKWN:
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case CHIPSET_TYPES: /* Shut up gcc */
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break;
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case CT_830:
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case CT_855GM:
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pci_writeb(map->b1, 0x8000005a);
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break;
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case CT_845G:
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case CT_865G:
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case CT_915G:
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case CT_915GM:
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case CT_945G:
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case CT_945GM:
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case CT_945GME:
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case CT_946GZ:
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case CT_G965:
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case CT_Q965:
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pci_writeb(map->b1, 0x80000091);
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pci_writeb(map->b2, 0x80000092);
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break;
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}
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#if DEBUG
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{
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unsigned int t = inl(0xcfc);
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debug("relock PAM: (0x%08x)\r\n", t);
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}
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#endif
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}
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#if 0
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static void list_modes(vbios_map *map, unsigned int raw)
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{
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unsigned int i, x, y;
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for (i=0; i < map->mode_table_size; i++) {
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switch(map->bios) {
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case BT_1:
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{
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vbios_resolution_type1 * res = map_type1_resolution(map, map->mode_table[i].resolution);
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x = ((((unsigned int) res->x2) & 0xf0) << 4) | res->x1;
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y = ((((unsigned int) res->y2) & 0xf0) << 4) | res->y1;
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if (x != 0 && y != 0) {
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debug("Mode %02x : %dx%d, %d bits/pixel\r\n", map->mode_table[i].mode, x, y, map->mode_table[i].bits_per_pixel);
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}
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if (raw)
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{
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debug("Mode %02x (raw) :\r\n\t%02x %02x\r\n\t%02x\r\n\t%02x\r\n\t%02x\r\n\t%02x\r\n\t%02x\r\n\t%02x\r\n", map->mode_table[i].mode, res->unknow1[0],res->unknow1[1], res->x1,res->x_total,res->x2,res->y1,res->y_total,res->y2);
|
|
}
|
|
|
|
}
|
|
break;
|
|
case BT_2:
|
|
{
|
|
vbios_resolution_type2 * res = map_type2_resolution(map, map->mode_table[i].resolution);
|
|
|
|
x = res->modelines[0].x1+1;
|
|
y = res->modelines[0].y1+1;
|
|
|
|
if (x != 0 && y != 0) {
|
|
debug("Mode %02x : %dx%d, %d bits/pixel\r\n", map->mode_table[i].mode, x, y, map->mode_table[i].bits_per_pixel);
|
|
}
|
|
}
|
|
break;
|
|
case BT_3:
|
|
{
|
|
vbios_resolution_type3 * res = map_type3_resolution(map, map->mode_table[i].resolution);
|
|
|
|
x = res->modelines[0].x1+1;
|
|
y = res->modelines[0].y1+1;
|
|
|
|
if (x != 0 && y != 0) {
|
|
debug("Mode %02x : %dx%d, %d bits/pixel\r\n", map->mode_table[i].mode, x, y, map->mode_table[i].bits_per_pixel);
|
|
}
|
|
}
|
|
break;
|
|
case BT_UNKWN:
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
#endif
|
|
|
|
static void gtf_timings(int x, int y, int freq, uint32_t *clock,
|
|
uint16_t *hsyncstart, uint16_t *hsyncend, uint16_t *hblank,
|
|
uint16_t *vsyncstart, uint16_t *vsyncend, uint16_t *vblank)
|
|
{
|
|
int hbl, vbl, vfreq;
|
|
|
|
vbl = y + (y+1)/(20000.0/(11*freq) - 1) + 1.5;
|
|
vfreq = vbl * freq;
|
|
hbl = 16 * (int)(x * (30.0 - 300000.0 / vfreq) /
|
|
(70.0 + 300000.0 / vfreq) / 16.0 + 0.5);
|
|
|
|
*vsyncstart = y;
|
|
*vsyncend = y + 3;
|
|
*vblank = vbl - 1;
|
|
*hsyncstart = x + hbl / 2 - (x + hbl + 50) / 100 * 8 - 1;
|
|
*hsyncend = x + hbl / 2 - 1;
|
|
*hblank = x + hbl - 1;
|
|
*clock = (x + hbl) * vfreq / 1000;
|
|
}
|
|
|
|
static int set_mode(vbios_map * map, unsigned int mode,
|
|
unsigned int x, unsigned int y, unsigned int bp,
|
|
unsigned int htotal, unsigned int vtotal)
|
|
{
|
|
int xprev, yprev;
|
|
unsigned int i, j;
|
|
int rv = -1;
|
|
|
|
for (i=0; i < map->mode_table_size; i++) {
|
|
if (map->mode_table[i].mode == mode) {
|
|
switch(map->bios) {
|
|
case BT_1:
|
|
{
|
|
vbios_resolution_type1 * res = map_type1_resolution(map, map->mode_table[i].resolution);
|
|
uint32_t clock;
|
|
uint16_t hsyncstart, hsyncend, hblank;
|
|
uint16_t vsyncstart, vsyncend, vblank;
|
|
|
|
if (bp) {
|
|
map->mode_table[i].bits_per_pixel = bp;
|
|
}
|
|
|
|
gtf_timings(x, y, freqs[0], &clock,
|
|
&hsyncstart, &hsyncend, &hblank,
|
|
&vsyncstart, &vsyncend, &vblank);
|
|
|
|
status("x = %d, y = %d, clock = %lu, h = %d %d %d, v = %d %d %d\n",
|
|
x, y, clock,
|
|
hsyncstart, hsyncend, hblank,
|
|
vsyncstart, vsyncend, vblank);
|
|
|
|
htotal = htotal ? htotal : (unsigned int)hblank+1;
|
|
vtotal = vtotal ? vtotal : (unsigned int)vblank+1;
|
|
|
|
res->clock = clock/10; /* Units appear to be 10 kHz */
|
|
res->x2 = (((htotal-x) >> 8) & 0x0f) | ((x >> 4) & 0xf0);
|
|
res->x1 = (x & 0xff);
|
|
|
|
res->y2 = (((vtotal-y) >> 8) & 0x0f) | ((y >> 4) & 0xf0);
|
|
res->y1 = (y & 0xff);
|
|
if (htotal)
|
|
res->x_total = ((htotal-x) & 0xff);
|
|
|
|
if (vtotal)
|
|
res->y_total = ((vtotal-y) & 0xff);
|
|
|
|
rv = 0;
|
|
}
|
|
break;
|
|
case BT_2:
|
|
{
|
|
vbios_resolution_type2 * res = map_type2_resolution(map, map->mode_table[i].resolution);
|
|
|
|
res->xchars = x / 8;
|
|
res->ychars = y / 16 - 1;
|
|
xprev = res->modelines[0].x1;
|
|
yprev = res->modelines[0].y1;
|
|
|
|
for(j=0; j < 3; j++) {
|
|
vbios_modeline_type2 * modeline = &res->modelines[j];
|
|
|
|
if (modeline->x1 == xprev && modeline->y1 == yprev) {
|
|
modeline->x1 = modeline->x2 = x-1;
|
|
modeline->y1 = modeline->y2 = y-1;
|
|
|
|
gtf_timings(x, y, freqs[j], &modeline->clock,
|
|
&modeline->hsyncstart, &modeline->hsyncend,
|
|
&modeline->hblank, &modeline->vsyncstart,
|
|
&modeline->vsyncend, &modeline->vblank);
|
|
|
|
if (htotal)
|
|
modeline->htotal = htotal;
|
|
else
|
|
modeline->htotal = modeline->hblank;
|
|
|
|
if (vtotal)
|
|
modeline->vtotal = vtotal;
|
|
else
|
|
modeline->vtotal = modeline->vblank;
|
|
}
|
|
}
|
|
|
|
rv = 0;
|
|
}
|
|
break;
|
|
case BT_3:
|
|
{
|
|
vbios_resolution_type3 * res = map_type3_resolution(map, map->mode_table[i].resolution);
|
|
|
|
xprev = res->modelines[0].x1;
|
|
yprev = res->modelines[0].y1;
|
|
|
|
for (j=0; j < 3; j++) {
|
|
vbios_modeline_type3 * modeline = &res->modelines[j];
|
|
|
|
if (modeline->x1 == xprev && modeline->y1 == yprev) {
|
|
modeline->x1 = modeline->x2 = x-1;
|
|
modeline->y1 = modeline->y2 = y-1;
|
|
|
|
gtf_timings(x, y, freqs[j], &modeline->clock,
|
|
&modeline->hsyncstart, &modeline->hsyncend,
|
|
&modeline->hblank, &modeline->vsyncstart,
|
|
&modeline->vsyncend, &modeline->vblank);
|
|
if (htotal)
|
|
modeline->htotal = htotal;
|
|
else
|
|
modeline->htotal = modeline->hblank;
|
|
if (vtotal)
|
|
modeline->vtotal = vtotal;
|
|
else
|
|
modeline->vtotal = modeline->vblank;
|
|
|
|
modeline->timing_h = y-1;
|
|
modeline->timing_v = x-1;
|
|
}
|
|
}
|
|
|
|
rv = 0;
|
|
}
|
|
break;
|
|
case BT_UNKWN:
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
return rv;
|
|
}
|
|
|
|
static inline void display_map_info(vbios_map * map) {
|
|
#ifdef DEBUG
|
|
static const char * bios_type_names[] =
|
|
{"UNKNOWN", "TYPE 1", "TYPE 2", "TYPE 3"};
|
|
static const char * chipset_type_names[] = {
|
|
"UNKNOWN", "830", "845G", "855GM", "865G", "915G", "915GM", "945G",
|
|
"945GM", "946GZ", "G965", "Q965", "945GME"
|
|
};
|
|
|
|
debug("Chipset: %s\r\n", chipset_type_names[map->chipset]);
|
|
debug("BIOS: %s\r\n", bios_type_names[map->bios]);
|
|
|
|
debug("Mode Table Offset: $C0000 + $%x\r\n",
|
|
((unsigned int)map->mode_table) - ((unsigned int)map->bios_ptr));
|
|
debug("Mode Table Entries: %u\r\n", map->mode_table_size);
|
|
#endif
|
|
(void)map;
|
|
}
|
|
|
|
int __vesacon_i915resolution(int x, int y)
|
|
{
|
|
vbios_map * map;
|
|
unsigned int mode = 0x52; /* 800x600x32 mode in known BIOSes */
|
|
unsigned int bp = 32; /* 32 bits per pixel */
|
|
int rv = 0;
|
|
|
|
good_marker(0);
|
|
|
|
map = open_vbios();
|
|
if (!map)
|
|
return -1;
|
|
|
|
good_marker(1);
|
|
|
|
display_map_info(map);
|
|
|
|
debug("\r\n");
|
|
|
|
if (mode && x && y) {
|
|
good_marker(2);
|
|
cli();
|
|
good_marker(3);
|
|
unlock_vbios(map);
|
|
good_marker(4);
|
|
rv = set_mode(map, mode, x, y, bp, 0, 0);
|
|
if (rv)
|
|
bad_marker(5);
|
|
else
|
|
good_marker(5);
|
|
relock_vbios(map);
|
|
good_marker(6);
|
|
sti();
|
|
|
|
debug("Patch mode %02x to resolution %dx%d complete\r\n", mode, x, y);
|
|
}
|
|
close_vbios(map);
|
|
|
|
return rv;
|
|
}
|