432 lines
8.5 KiB
C
432 lines
8.5 KiB
C
/* ----------------------------------------------------------------------- *
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*
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* Pportions of this file taken from the dmidecode project
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*
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* Copyright (C) 2000-2002 Alan Cox <alan@redhat.com>
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* Copyright (C) 2002-2008 Jean Delvare <khali@linux-fr.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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* For the avoidance of doubt the "preferred form" of this code is one which
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* is in an open unpatent encumbered format. Where cryptographic key signing
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* forms part of the process of creating an executable the information
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* including keys needed to generate an equivalently functional executable
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* are deemed to be part of the source code.
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*/
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#include <dmi/dmi.h>
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#include <stdio.h>
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const char *dmi_processor_type(uint8_t code)
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{
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/* 3.3.5.1 */
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static const char *type[] = {
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"Other", /* 0x01 */
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"Unknown",
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"Central Processor",
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"Math Processor",
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"DSP Processor",
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"Video Processor" /* 0x06 */
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};
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if (code >= 0x01 && code <= 0x06)
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return type[code - 0x01];
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return out_of_spec;
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}
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const char *dmi_processor_family(uint8_t code, char *manufacturer)
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{
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/* 3.3.5.2 */
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/* TODO : Need to implement code/value (see dmidecode) insteed of array to address large index */
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static const char *family[256] = {
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NULL, /* 0x00 */
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"Other",
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"Unknown",
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"8086",
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"80286",
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"80386",
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"80486",
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"8087",
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"80287",
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"80387",
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"80487",
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"Pentium",
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"Pentium Pro",
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"Pentium II",
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"Pentium MMX",
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"Celeron",
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"Pentium II Xeon",
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"Pentium III",
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"M1",
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"M2",
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"Celeron M", /* 0x14 */
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"Pentium 4 HT",
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NULL,
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NULL, /* 0x17 */
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"Duron",
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"K5",
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"K6",
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"K6-2",
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"K6-3",
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"Athlon",
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"AMD2900",
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"K6-2+",
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"Power PC",
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"Power PC 601",
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"Power PC 603",
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"Power PC 603+",
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"Power PC 604",
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"Power PC 620",
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"Power PC x704",
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"Power PC 750",
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"Core 2 Duo", /* 0x28 */
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"Core 2 Duo Mobile",
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"Core Solo Mobile",
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"Atom",
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NULL,
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NULL,
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NULL,
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NULL, /* 0x2F */
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"Alpha",
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"Alpha 21064",
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"Alpha 21066",
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"Alpha 21164",
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"Alpha 21164PC",
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"Alpha 21164a",
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"Alpha 21264",
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"Alpha 21364",
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NULL, /* 0x38 */
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL, /* 0x3F */
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"MIPS",
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"MIPS R4000",
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"MIPS R4200",
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"MIPS R4400",
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"MIPS R4600",
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"MIPS R10000",
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NULL, /* 0x46 */
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL, /* 0x4F */
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"SPARC",
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"SuperSPARC",
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"MicroSPARC II",
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"MicroSPARC IIep",
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"UltraSPARC",
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"UltraSPARC II",
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"UltraSPARC IIi",
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"UltraSPARC III",
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"UltraSPARC IIIi",
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NULL, /* 0x59 */
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL, /* 0x5F */
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"68040",
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"68xxx",
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"68000",
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"68010",
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"68020",
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"68030",
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NULL, /* 0x66 */
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL, /* 0x6F */
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"Hobbit",
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NULL, /* 0x71 */
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL, /* 0x77 */
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"Crusoe TM5000",
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"Crusoe TM3000",
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"Efficeon TM8000",
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NULL, /* 0x7B */
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NULL,
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NULL,
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NULL,
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NULL, /* 0x7F */
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"Weitek",
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NULL, /* 0x81 */
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"Itanium",
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"Athlon 64",
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"Opteron",
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"Sempron",
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"Turion 64", /* 0x86 */
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"Dual-Core Opteron",
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"Atlhon 64 X2",
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"Turion 64 X2",
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"Quad-Core Opteron",
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"Third-Generation Opteron",
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"Phenom FX",
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"Phenom X4",
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"Phenom X2",
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"Athlon X2", /* 0x8F */
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"PA-RISC",
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"PA-RISC 8500",
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"PA-RISC 8000",
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"PA-RISC 7300LC",
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"PA-RISC 7200",
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"PA-RISC 7100LC",
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"PA-RISC 7100",
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NULL, /* 0x97 */
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL, /* 0x9F */
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"V30",
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"Quad-Core Xeon 3200", /* 0xA1 */
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"Dual-Core Xeon 3000",
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"Quad-Core Xeon 5300",
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"Dual-Core Xeon 5100",
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"Dual-Core Xeon 5000",
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"Dual-Core Xeon LV",
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"Dual-Core Xeon ULV",
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"Dual-Core Xeon 7100",
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"Quad-Core Xeon 5400",
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"Quad-Core Xeon", /* 0xAA */
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"Dual-Core Xeon 5200",
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"Dual-Core Xeon 7200",
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"Quad-Core Xeon 7300",
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"Quad-Core Xeon 7400",
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"Multi-Core Xeon 7400", /* 0xAF */
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"Pentium III Xeon",
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"Pentium III Speedstep",
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"Pentium 4",
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"Xeon",
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"AS400",
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"Xeon MP",
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"Athlon XP",
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"Athlon MP",
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"Itanium 2",
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"Pentium M",
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"Celeron D", /* 0xBA */
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"Pentium D",
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"Pentium EE",
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"Core Solo", /* 0xBD */
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NULL,
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"Core 2 Duo",
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"Core 2 Solo",
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"Core 2 Extreme",
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"Core 2 Quad",
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"Core 2 Extreme Mobile",
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"Core 2 Duo Mobile",
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"Core 2 Solo Mobile",
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"Core i7",
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"Dual-Core Celeron", /* 0xC7 */
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"IBM390",
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"G4",
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"G5",
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"ESA/390 G6", /* 0xCB */
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"z/Architectur",
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NULL,
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NULL,
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NULL,
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NULL, /*0xD0 */
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NULL,
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"C7-M",
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"C7-D",
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"C7",
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"Eden",
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"Multi-Core Xeon", /*0xD6 */
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"Dual-Core Xeon 3xxx",
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"Quad-Core Xeon 3xxx", /*0xD8 */
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NULL,
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"Dual-Core Xeon 5xxx", /*0xDA */
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"Quad-Core Xeon 5xxx",
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NULL,
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"Dual-Core Xeon 7xxx", /*0xDD */
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"Quad-Core Xeon 7xxx",
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"Multi-Core Xeon 7xxx",
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NULL, /*0xE0 */
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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"Embedded Opteron Quad-Core", /* 0xE6 */
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"Phenom Triple-Core",
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"Turion Ultra Dual-Core Mobile",
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"Turion Dual-Core Mobile",
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"Athlon Dual-Core",
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"Sempron SI", /*0xEB */
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL, /* 0xF9 */
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"i860",
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"i960",
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NULL, /* 0xFC */
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NULL,
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NULL,
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NULL, /* 0xFF */
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};
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/* Special case for ambiguous value 0xBE */
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if (code == 0xBE) {
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/* Best bet based on manufacturer string */
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if (strstr(manufacturer, "Intel") != NULL
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|| strncasecmp(manufacturer, "Intel", 5) == 0)
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return "Core 2";
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if (strstr(manufacturer, "AMD") != NULL
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|| strncasecmp(manufacturer, "AMD", 3) == 0)
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return "K7";
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return "Core 2 or K7";
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}
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if (family[code] != NULL) {
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return family[code];
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}
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return out_of_spec;
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}
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const char *dmi_processor_status(uint8_t code)
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{
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static const char *status[] = {
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"Unknown", /* 0x00 */
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"Enabled",
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"Disabled By User",
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"Disabled By BIOS",
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"Idle", /* 0x04 */
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"<OUT OF SPEC>",
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"<OUT OF SPEC>",
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"Other" /* 0x07 */
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};
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if (code <= 0x04)
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return status[code];
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if (code == 0x07)
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return status[0x05];
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return out_of_spec;
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}
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const char *dmi_processor_upgrade(uint8_t code)
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{
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/* 3.3.5.5 */
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static const char *upgrade[] = {
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"Other", /* 0x01 */
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"Unknown",
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"Daughter Board",
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"ZIF Socket",
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"Replaceable Piggy Back",
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"None",
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"LIF Socket",
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"Slot 1",
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"Slot 2",
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"370-pin Socket",
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"Slot A",
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"Slot M",
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"Socket 423",
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"Socket A (Socket 462)",
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"Socket 478",
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"Socket 754",
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"Socket 940",
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"Socket 939" /* 0x12 */
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"Socket mPGA604",
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"Socket LGA771",
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"Socket LGA775",
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"Socket S1",
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"Socket AM2",
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"Socket F (1207)"
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"Socket LGA1366" /* 0x19 */
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};
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if (code >= 0x01 && code <= 0x19)
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return upgrade[code - 0x01];
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return out_of_spec;
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}
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void dmi_processor_cache(uint16_t code, const char *level, uint16_t ver,
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char *cache)
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{
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if (code == 0xFFFF) {
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if (ver >= 0x0203)
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sprintf(cache, "Not Provided");
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else
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sprintf(cache, "No %s Cache", level);
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} else
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sprintf(cache, "0x%04X", code);
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}
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/* Intel AP-485 revision 28, table 5 */
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const char *cpu_flags_strings[PROCESSOR_FLAGS_ELEMENTS] = {
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"FPU (Floating-point unit on-chip)", /* 0 */
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"VME (Virtual mode extension)",
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"DE (Debugging extension)",
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"PSE (Page size extension)",
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"TSC (Time stamp counter)",
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"MSR (Model specific registers)",
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"PAE (Physical address extension)",
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"MCE (Machine check exception)",
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"CX8 (CMPXCHG8 instruction supported)",
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"APIC (On-chip APIC hardware supported)",
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NULL, /* 10 */
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"SEP (Fast system call)",
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"MTRR (Memory type range registers)",
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"PGE (Page global enable)",
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"MCA (Machine check architecture)",
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"CMOV (Conditional move instruction supported)",
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"PAT (Page attribute table)",
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"PSE-36 (36-bit page size extension)",
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"PSN (Processor serial number present and enabled)",
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"CLFSH (CLFLUSH instruction supported)",
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NULL, /* 20 */
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"DS (Debug store)",
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"ACPI (ACPI supported)",
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"MMX (MMX technology supported)",
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"FXSR (Fast floating-point save and restore)",
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"SSE (Streaming SIMD extensions)",
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"SSE2 (Streaming SIMD extensions 2)",
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"SS (Self-snoop)",
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"HTT (Hyper-threading technology)",
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"TM (Thermal monitor supported)",
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"IA64 (IA64 capabilities)", /* 30 */
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"PBE (Pending break enabled)" /* 31 */
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};
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